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www.irf.com 1 automotive mosfet pd - 95947 hexfet ? power mosfet v dss = 60v r ds(on) = 12m ? i d = 57a specifically designed for automotive applications, this hexfet ? power mosfet utilizes the latest processing techniques to achieve extremely low on- resistance per silicon area. additional features of this design are a 175c junction operating tempera- ture, fast switching speed and improved repetitive avalanche rating . these features combine to make this design an extremely efficient and reliable device for use in automotive applications and a wide variety of other applications. s d g description advanced process technology ultra low on-resistance 175c operating temperature fast switching repetitive avalanche allowed up to tjmax features irfz44vzpbf IRFZ44VZSPBF irfz44vzlpbf d 2 pak IRFZ44VZSPBF to-220ab irfz44vzpbf to-262 irfz44vzlpbf absolute maximum ratings parameter units i d @ t c = 25c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 100c continuous drain current, v gs @ 10v a i dm p u l se d d ra i n c urrent p d @t c = 25c power dissipation w linear derating factor w/c v gs gate-to-source voltage v e as (thermally limited) si ng l e p u l se a va l anc h e e nergy mj e as (tested ) si ng l e p u l se a va l anc h e e nergy t este d v a l ue i ar a va l anc h e c urrent a e ar r epet i t i ve a va l anc h e e nergy mj t j operating junction and t stg storage temperature range c soldering temperature, for 10 seconds mounting torque, 6-32 or m3 screw thermal resistance parameter typ. max. units r jc junction-to-case ??? 1.64 c/w r cs case-to-sink, flat greased surface 0.50 ??? r ja junction-to-ambient ??? 62 r ja junction-to-ambient (pcb mount) ??? 40 -55 to + 175 300 (1.6mm from case ) 10 lbf in (1.1n m) 92 0.61 20 max. 57 40 230 110 73 see fig.12a, 12b, 15, 16 lead-free

2 www.irf.com electrical characteristics @ t j = 25c (unless otherwise specified) parameter min. typ. max. units v (br)dss drain-to-source breakdown voltage 60 ??? ??? v ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? 0.061 ??? v/c r ds(on) static drain-to-source on-resistance ??? 9.6 12 m ? v gs(th) gate threshold voltage 2.0 ??? 4.0 v gfs forward transconductance 25 ??? ??? v i dss drain-to-source leakage current ??? ??? 20 a ??? ??? 250 i gss gate-to-source forward leakage ??? ??? 200 na gate-to-source reverse leakage ??? ??? -200 q g total gate charge ??? 43 65 q gs gate-to-source charge ??? 11 ??? nc q gd gate-to-drain ("miller") charge ??? 18 ??? t d(on) turn-on delay time ??? 14 ??? t r rise time ??? 62 ??? t d(off) turn-off delay time ??? 35 ??? ns t f fall time ??? 38 ??? l d internal drain inductance ??? 4.5 ??? between lead, nh 6mm (0.25in.) l s internal source inductance ??? 7.5 ??? from package and center of die contact c iss input capacitance ??? 1690 ??? c oss output capacitance ??? 270 ??? c rss reverse transfer capacitance ??? 130 ??? pf c oss output capacitance ??? 1870 ??? c oss output capacitance ??? 260 ??? c oss eff. effective output capacitance ??? 510 ??? source-drain ratin g s and characteristics parameter min. typ. max. units i s continuous source current ??? ??? 57 (body diode) a i sm pulsed source current ??? ??? 230 (body diode) v sd diode forward voltage ??? ??? 1.3 v t rr reverse recovery time ??? 23 35 ns q rr reverse recovery charge ??? 17 26 nc t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by ls+ld) v gs = 0v, v ds = 1.0v, ? = 1.0mhz v gs = 0v, v ds = 48v, ? = 1.0mhz v gs = 0v, v ds = 0v to 48v v gs = 10v v dd = 30v i d = 34a r g = 12 ? t j = 25c, i s = 34a, v gs = 0v t j = 25c, i f = 34a, v dd = 30v di/dt = 100a/s conditions v gs = 0v, i d = 250a reference to 25c, i d = 1ma v gs = 10v, i d = 34a v ds = v gs , i d = 250a v ds = 60v, v gs = 0v v ds = 60v, v gs = 0v, t j = 125c mosfet symbol showing the integral reverse p-n junction diode. v ds = 25v, i d = 34a i d = 34a v ds = 48v conditions v gs = 10v v gs = 0v v ds = 25v ? = 1.0mhz v gs = 20v v gs = -20v s d g

www.irf.com 3 fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. typical forward transconductance vs. drain current 0 102030405060 i d, drain-to-source current (a) 0 10 20 30 40 50 60 g f s , f o r w a r d t r a n s c o n d u c t a n c e ( s ) t j = 25c t j = 175c v ds = 15v 380s pulse width 4.0 5.0 6.0 7.0 8.0 9.0 v gs , gate-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) v ds = 25v 60s pulse width t j = 25c t j = 175c 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 60s pulse width tj = 25c 4.5v vgs top 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 60s pulse width tj = 175c 4.5v vgs top 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v

4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 1 10 100 v ds , drain-to-source voltage (v) 0 500 1000 1500 2000 2500 3000 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 0 102030405060 q g total gate charge (nc) 0 4 8 12 16 20 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 48v vds= 30v vds= 12v i d = 34a for test circuit see figure 13 0.2 0.6 1.0 1.4 1.8 v sd , source-todrain voltage (v) 0.1 1.0 10.0 100.0 1000.0 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 1 10 100 1000 v ds , drain-tosource voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 175c single pulse 1msec 10msec operation in this area limited by r ds (on) 100sec

www.irf.com 5 fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature fig 10. normalized on-resistance vs. temperature 25 50 75 100 125 150 175 t j , junction temperature (c) 0 10 20 30 40 50 60 i d , d r a i n c u r r e n t ( a ) -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.5 1.0 1.5 2.0 2.5 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 34a v gs = 10v 1e-006 1e-005 0.0001 0.001 0.01 0.1 t 1 , rectangular pulse duration (sec) 0.001 0.01 0.1 1 10 t h e r m a l r e s p o n s e ( z t h j c ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc ri (c/w) i (sec) 0.960 0.00044 0.680 0.00585 j j 1 1 2 2 r 1 r 1 r 2 r 2 c ci i / ri ci= i / ri

6 www.irf.com q g q gs q gd v g charge fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as fig 14. threshold voltage vs. temperature r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 50 100 150 200 250 300 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 3.8a 5.0a bottom 34a -75 -50 -25 0 25 50 75 100 125 150 175 t j , temperature ( c ) 1.0 2.0 3.0 4.0 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 250a 1k vcc dut 0 l

www.irf.com 7 fig 15. typical avalanche current vs.pulsewidth fig 16. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 15, 16: (for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 12a, 12b. 4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 15, 16). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figure 11) p d (ave) = 1/2 ( 1.3bvi av ) = t/ z thjc i av = 2 t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 0.1 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav assuming ? tj = 25c due to avalanche losses. note: in no case should tj be allowed to exceed tjmax 0.01 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 20 40 60 80 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1% duty cycle i d = 34a

8 www.irf.com fig 17.

for n-channel hexfet power mosfets
?
? ? p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period
+ - + + + - - - ?
?
!"!! ?

# $$ ? !"!!%" v ds 90% 10% v gs t d(on) t r t d(off) t f &' 1 (
# 0.1 % + - fig 18a. switching time test circuit fig 18b. switching time waveforms

www.irf.com 9

dimensions are shown in millimeters (inches)

example: in the assembly line "c" t his is an irf 1010 lot code 1789 as s e mb le d on ww 19, 1997 part number as s e mb l y lot code dat e code year 7 = 1997 line c we e k 19 logo re ct ifier int ernat ional note: "p" in assembly line position indicates "lead-free" lead assignments 1 - gate 2 - drain 3 - source 4 - drain - b - 1.32 (.052) 1.22 (.048) 3x 0.55 (.022) 0.46 (.018) 2.92 (.115) 2.64 (.104) 4.69 (.185) 4.20 (.165) 3x 0.93 (.037) 0.69 (.027) 4.06 (.160) 3.55 (.140) 1.15 (.045) min 6.47 (.255) 6.10 (.240) 3.78 (.149) 3.54 (.139) - a - 10.54 (.415) 10.29 (.405) 2.87 (.113) 2.62 (.103) 15.24 (.600) 14.84 (.584) 14.09 (.555) 13.47 (.530) 3x 1.40 (.055) 1.15 (.045) 2.54 (.100) 2x 0.36 (.014) m b a m 4 1 2 3 notes: 1 dimensioning & tolerancing per ansi y14.5m, 1982. 3 outline conforms to jedec outline to-220ab. 2 controlling dimension : inch 4 heatsink & lead measurements do n ot include burrs. hexfet 1- gate 2- drain 3- source 4- drain lead assignments igbts, copack 1- gate 2- collector 3- emitter 4- collector

10 www.irf.com n ote: "p " in as s embly line pos ition indicates "l ead-f ree" f 530s t h is is an ir f 530s wit h lot code 8024 as s e mb le d on ww 02, 2000 in t h e as s e mb l y l ine "l " as s e mb l y lot code in t e r nat ional r e ct if ie r logo part number date code ye ar 0 = 2000 we ek 02 line l f 530s a = as s e mb l y s it e code week 02 p = d e s ign at e s l e ad-f r e e product (optional) r e ct if ie r int e r nat ional logo lot code as s e mb l y ye ar 0 = 2000 date code part number

dimensions are shown in millimeters (inches)

www.irf.com 11 to-262 part marking information to-262 package outline as s e mb l y lot code rectifier int e r nat ional as s e mb l e d on ww 19, 1997 n ote: "p " in as s embly line pos ition indicates "l ead-f ree" in t h e as s e mb l y l ine "c" logo t h is is an ir l 3103l lot code 1789 example: line c dat e code week 19 ye ar 7 = 1997 part number part number logo lot code as s e mb l y int e r nat ional rectifier product (optional) p = designates lead-free a = as s e mb l y s it e code week 19 ye ar 7 = 1997 dat e code or

12 www.irf.com data and specifications subject to change without notice. this product has been designed and qualified for the automotive [q101]market. qualification standards can be found on ir?s web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 11/04 to-220ab package is not recommended for surface mount application. repetitive rating; pulse width limited by max. junction temperature. (see fig. 11). limited by t jmax , starting t j = 25c, l = 0.12mh r g = 25 ? , i as = 34a, v gs =10v. part not recommended for use above this value. pulse width 1.0ms; duty cycle 2%. c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss .
limited by t jmax , see fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. this value determined from sample failure population. 100% tested to this value in production. this is only applied to to-220ab pakcage. this is applied to d 2 pak, when mounted on 1" square pcb (fr- 4 or g-10 material). for recommended footprint and soldering techniques refer to application note #an-994. 3 4 4 trr feed direction 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) trl feed direction 10.90 (.429) 10.70 (.421) 16.10 (.634) 15.90 (.626) 1.75 (.069) 1.25 (.049) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 4.72 (.136) 4.52 (.178) 24.30 (.957) 23.90 (.941) 0.368 (.0145) 0.342 (.0135) 1.60 (.063) 1.50 (.059) 13.50 (.532) 12.80 (.504) 330.00 (14.173) max. 27.40 (1.079) 23.90 (.941) 60.00 (2.362) min. 30.40 (1.197) max. 26.40 (1.039) 24.40 (.961) notes : 1. comforms to eia-418. 2. controlling dimension: millimeter. 3. dimension measured @ hub. 4. includes flange distortion @ outer edge. d 2 pak tape & reel infomation
note: for the most current drawings please refer to the ir website at: http://www.irf.com/package/

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